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- VexRiscv: A Modular RISC-V Implementation for FPGA : r/RISCV
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- GitHub - mikeakohn/riscv_fpga: Implementation of a RISC-V CPU in Verilog.
- A Scratch-built RISC-V CPU In An FPGA : r/RISCV
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- GitHub - MuhammadAmarkazi/RISC-V-FPGA-Implementation
- FPGA Badge Hack: Linux on RISC-V | PPT